The increasing amount of data that has to be processed in today’s electronic devices requires a transition from the conventional compute centric paradigm to a more data centric paradigm. In order to bridge the existing gap between memory and logic units that is known as the classical von Neumann bottleneck the concept of physical separation between computing and memory unit has to be repealed. Neuro inspired architectures constitute a promising solution where both logic and memory functionality become synergized together in one synaptic unit.

The ultimate goal of BeFerroSynaptic is to develop a technology platform based on back-end-of-line (BEOL) integrated ferroelectric HfO2-based synaptic devices to tackle the challenges of next generation electronic devices. Our attempt is to demonstrate the feasibility of its adoption in an extremely energy-efficient neuromorphic computing architecture that goes far beyond the conventional CMOS paradigm.

This projects’ ambitious goal to overcome the well-known von Neumann bottleneck’s data transfer restriction and to bridge the gap between memory and logic units, can be achieved by locating the memory units next to the computation engines. This approach takes its cue from neuro inspired architectures, where both logic and memory functionalities become synergized together in one synaptic unit.

Energy efficiency is key and can be achieved through an extremely low power consumption, mainly via four concepts:

1. The combination of memory and computing functionalities within one single unit

2. Asynchronous functioning of SNN chips instead of “always ON-clock frequency synchronization” of conventional CPU/GPU

3. Utilization of single analogue switching mechanism in densely connected convolutional neural networks (CNN)
   
4. Adoption of time dependent information processing, similarly to what happens in spiking neural networks, where any event generates feedback connections between different layers of the neural network at an inherently low power